Renesas
RZ/V AI
The best solution for
starting your AI applications.
Provided by Renesas Electronics Corporation
To keep you updated,
Watch our GitHub repository
Watch
This project is maintained by renesas-rz
Hosted on GitHub Pages — Theme by orderedlist
RZ/V2H AI SDK Configuration
This page explains the details of RZ/V2H AI SDK configurations.
To see the overview of RZ/V2H AI SDK, see RZ/V AI SDK Overview page.
Target Version: 5.00
Linux Components
The Linux components which are commonly used in RZ/V2H AI SDK is shown below.| Component | Version | Explanation |
|---|---|---|
| Yocto Linux |
Yocto version: 3.1.31 (Dunfell)
Kernel version: 5.10.145-cip17 |
|
| OpenCV | 4.1.0 | |
| OpenCL | 1.1, 1.2, 2.0 Full Profile. | |
| 3.0 Full Profile |
This is not guaranteed to be backwards compatible with the previous versions of OpenCL. |
|
| OpenGLES | 1.1, 2.0, 3.0, 3.1 and 3.2 | |
| OpenMAX IL | 1.1 |
This is used for H.264 encoding/decoding and H.265 encoding/decoding. |
-
"references/core-image-weston-rzv2h-evk-ver1.manifest"in RZ/V2H AI SDK.
Drivers
Following table shows the list of drivers.For more details, see RZ/V2H BSP Manual Set and RZ/V2H Evaluation Board Kit Hardware Manual.
Note
✔ shows newly supported drivers.
| Items | IP | Support | Remarks |
|---|---|---|---|
| CPU | CPU/CA55 | ✔ |
Supports 1.1GHz, 1.5GHz, 1.6GHz and 1.7GHz. If you use CA55 at 1.8GHz, you will need configuration at system startup. For configuration instructions, see RZ/V Multi-OS Package. |
| External memory | LPDDR4 | ✔ | |
| Graphics | 3D GPU | ✔ | |
| LCD Controller | ✔ | ||
| Image Scaling Unit | ✔ | ||
| Camera Input | MIPI-CSI/4lane x4 | ✔ | |
| Display Out | MIPI-DSI/4lane x1 | ✔ | |
| Video Codec | H.264 | ✔ | AI SDK v5.00 newly supports Decoder in addition to Encoder. |
| H.265 | ✔ | ||
| Audio | SSIF-2 TDM x8 | ✔ | |
| SPDIF x3 | ✔ | ||
| ASRC(Asynchronous sample rate conversion) | ✔ | ||
| Timers | OSTM/6ch | ✔ | |
| SYC (SystemCounter) | ✔ | ||
| WDT/4ch | ✔ | ||
| RTC | ✔ | ||
| Analog | ADC 12bitx8 | ✔ | |
| TSU | ✔ | ||
| Connectivity | USB3(Gen2x1) hostx2 | ✔ | |
| USB2.0 host/func x1 host x1 | ✔ | ||
| SDHI(UHS-I) | ✔ | ||
| eMMC | N/A | The board does not support eMMC. | |
| Gb Ether x2 | ✔ | ||
| PCIe Gen.3 4Lane x1 or 2Lane x2 RC | ✔ | ||
| PCIe Gen.3 4Lane x1 or 2Lane x2 EP | N/A | The board does not support PCIe EP. | |
| CANFD | ✔ | ||
| RSCI-2 x10 | ✔ | ||
| SCIF x1 | ✔ | ||
| I2C x9 | ✔ | ||
| I3C x1 | ✔ | ||
| IRQ | ✔ | ||
| NMI | ✔ | ||
| GPIO | ✔ | ||
| System | CPG | ✔ | |
| DMAC/80ch (16ch/unit * 5unit) | ✔ |
Note
If the system does not work properly, such as the stream stopping,
when using DRP-AI TVM in combination with a camera connected via MIPI, USB or Ethernet, please apply the bus setting patch.
This patch sets the number of bytes per access to minimize the impact on operations between units when each RZ/V2H unit accesses the DDR.
Please apply this patch with caution after thorough verification.
(Patch file: 0001-pre-system-setting-for-RZV2H-AI_SDK-v5.00.patch, 0002-CRU-setting-for-RZV2H-AI_SDK-v5.00.patch)
For how to apply the patch, please refer the How to Build RZ/V2H AI SDK.
This patch sets the number of bytes per access to minimize the impact on operations between units when each RZ/V2H unit accesses the DDR.
Please apply this patch with caution after thorough verification.
(Patch file: 0001-pre-system-setting-for-RZV2H-AI_SDK-v5.00.patch, 0002-CRU-setting-for-RZV2H-AI_SDK-v5.00.patch)
For how to apply the patch, please refer the How to Build RZ/V2H AI SDK.
Limitations
RZ/V2H AI SDK v5.00 has the following limitations.- Some AI models with frequent memory accesses may affect the performance of other LSI functions that access memory. We are considering to improve this issue in the next release version.